- From: Derek Foreman <Derek.Foreman_at_nrc-cnrc.gc.ca>
- Date: Fri, 18 Nov 2005 11:40:41 -0600 (CST)
On Wed, 16 Nov 2005, Frank Mori Hess wrote: > On Wednesday 16 November 2005 04:55 pm, Derek Foreman wrote: >> Hi, >> >> (I posted this briefly a few months ago) >> >> I'm using a measurement computing pci-das6036 card, acquiring 10 >> channels at 20khz. >> >> Measuring the STARTSCAN signal with an oscope showed the actual sampling >> rate to be 19.997khz or so. >> >> It looks to me like the (rather spartan) register map's note that >> "ADC Pacer Frequency = Base_clock/(Divider + 3)" >> for the ADC Sample interval also applies to the Delay interval. >> >> With the following patch in place, I sample at 20khz as intended. >> >> Anyone know if this is the right thing to do, and if it isn't... what >> is? > > It's fine in principle, although the same minus 3 would need to be applied > to the TRIG_TIMER case also. I didn't apply your change before because > when I wrote that code originally I checked it on my board (a 6025 I > think) and it was right. I was going to check again but never got around > to it and forgot about it (sorry). To be sure what you're seeing is real > and not just due to your board oscillator being a little off you need to > do it again with 1 channel at 200khz. If it is real, the percent error in > actual sampling rate should increase by a factor of 10 (that is, a 100 > times larger error in frequency). Ok, I got the same oscilloscope back for some additional testing... I ran several different channel counts/rates while monitoring the startscan signal. The first column is the stock driver, the second is with my "- 3" change 1ch_at_200khz 197.046khz 200.001khz 1ch_at_100khz 99.2563khz 100.001khz 10ch_at_20khz 19.9971khz 20.0002khz 5ch_at_20khz 19.9942khz 20.0002khz 1ch_at_20khz 19.9702khz 20.0002khz So I think I can conclude that the problem is real, at least with a measurement computing pci-das 6036 card.
Received on 2005-11-18Z17:40:41