Re: NI PCI-6025e counter problem

Would it be possible to post these files somewhere? I'd be more than 
interested!

Kind regards,
Arno Stienen.

tupperfungus_at_netscape.net wrote:
> Hi Jordi,
> 
> The functions you gave worked perfectly pretty much right away. The 
> example program was very helpful as well.  Thanks a lot for taking the 
> time to share all of it.
> 
> Thanks again,
> -Leon Aksman
> 
> -----Original Message-----
> From: Jordi Blanch Carles <jordi_blanch_at_encopim.com>
> To: tupperfungus_at_netscape.net
> Cc: comedi_at_comedi.org
> Sent: Fri, 10 Feb 2006 09:51:16 +0100
> Subject: Re: NI PCI-6025e counter problem
> 
>  Try to use these files. We had success with them one year ago.
> 
>  In order to have positive and negative counts when the encoder counts 
> up or down, we initialized the counter at the half of it's total count 
> (2^23) and then substracted the same value after returning the result in 
> our reading function.
> 
> Hope it helps
> 
>  El dj 09 de 02 del 2006 a les 16:35 -0500, en/na 
> tupperfungus_at_netscape.net va escriure:  Hi,
> 
> I'm trying to figure out how to use comedi to read from one of the two
> counters on the NI PCI-6025e board.
> I've tried using:
> 
> comedi_data_read(device, 4, 0, 0, AREF_GROUND, &data)
> 
> since i know it's the fifth subdevice on the board and I want to read
> from the first channel using the only available range for the subdevice.
> On the hardware end, I've got a two channel (A and B) encoder that I
> convert to CLK and UP/DN signals using an LS7084 chip (very similar to
> LS7184) as explained in the NI website's "Using Quadrature Encoders
> with E Series DAQ Boards" at:
> http://zone.ni.com/devzone/devzoneweb.nsf/Opendoc?openagent&36BD71244BB26
> 
> FC886256869005E541B
> 
> I'm connecting the LS7084's CLK signal to the board's PFI8/CTR 0 SRC
> line and the UP/DN signal to the P0.6 line. I've checked the two
> signals coming out of the LS7084 and they seem to be functioning
> correctly.
> 
> The problem is that the value I get from the comedi_data_read call does
> not change (it's a large number on the order of 2^24, which is
> encouraging since the counter is 24 bit). The signals coming into the
> board do not seem to be incrementing the internal counter up or down.
> 
> Am I doing something wrong either in how I'm connecting these signals
> (do I need to do something with the CTR 0 GATE line as well?) or am I
> not setting something up properly on the comedi end?
> 
> Any help would be greatly appreciated.
> 
> Thanks a lot,
> -Leon Aksman
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> Jordi Blanch Carles
> Unidad de Ensayo y Control
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Received on 2006-02-11Z09:30:11