- From: Anders Blomdell <anders.blomdell_at_control.lth.se>
- Date: Mon, 25 Jun 2007 19:31:25 +0200
Anders Blomdell wrote:
> Anders Blomdell wrote:
>> Frank Mori Hess wrote:
>>> On Thursday 21 June 2007 13:36, you wrote:
>>>> I know (I'll get to it as soon as I have figured out how to use the NI
>>>> pci-6221 with quadrature encoders).
>>> See the enums in comedi.h, in particular enum ni_gpct_mode_bits. You'll
>>> need to use one of the NI_GPCT_COUNTING_MODE_QUADRATURE_XN_BITS bitfields,
>>> instead of the NI_GPCT_COUNTING_MODE_NORMAL_BITS that the simple counting
>>> demo uses. And maybe some of the NI_GPCT_INDEX_* bits. It might actually
>>> be useful to look at the ni 6601/6602 register level programming manual.
>> That only partially works, what happens is that whatever
>> NI_GPCT_COUNTING_MODE_QUADRATURE_XN_BITS is selected, the counter starts to
>> count down on each edge on CTR{0/1}A (PFI 8/PFI 3) but remains stationary
>> regardless of activity on CTR{0/1}B (PFI 10/PFI 11). To me this indicates that
>> the counter is not in encoder mode, because a failure in the routing of the B
>> signal should result in the counter changing one value only (X0 -> X1 -> X0
>> transitions should gige one up and one down event). Direction is changed if
>> NI_GPCT_COUNTING_DIRECTION_UP_BITS is set.
>>
>> Where can I find the documentation where M_Offset_G0_Counting_Mode, etc are
>> found (the only document I have found on NI's site is "NI M Series Register Map
>> (Preliminay)"
>
> The following hack (gleaned after getting a working example in the NI
> nimhddk_linux26/nimseries register level programming), makes it work:
>
> case NITIO_G0_Counting_Mode_Reg:
> ni_writew(bits, M_Offset_G0_Counting_Mode);
> bits = 0x26a0;
> ni_writew(bits, M_Offset_G0_MSeries_ABZ);
> break;
>
> Seems like we (I?) need to add functionality to do the equivalent of (see
> attached NI/RLP example for context):
>
> board->G0_MSeries_ABZ.setG0_A_Select(9);
> board->G0_MSeries_ABZ.setG0_B_Select(21);
> board->G0_MSeries_ABZ.flush();
>
> any comments on what it should look like (or is it already there, but hidden by
> my ignorance)?
I have looked a little more on the comedi code. The functionality seems to be
lacking (or I'm totally blind). Which of the following implementations is preferred:
1. Adding INSN_CONFIG_SET_ABZ_SRC, which accepts two arguments:
index [0=A, 1=B, 2=Z]
source [1-10=PFI0-PFI9, 21-26=PFI10-PFI15, 31=DISABLED, ...]
2. Adding INSN_CONFIG_SET_A_SRC, INSN_CONFIG_SET_B_SRC, INSN_CONFIG_SET_Z_SRC,
which accepts 1 argument:
source [1-10=PFI0-PFI9, 21-26=PFI10-PFI15, 31=DISABLED, ...]
3. Modify INSN_CONFIG_SET_GATE_SRC to accept
index [2=A, 3=B, 4=Z]
source [1-10=PFI0-PFI9, 21-26=PFI10-PFI15, 31=DISABLED, ...]
4. None of the above, please fill in a rough sketch on dotted line below:
...........................................
Regards
Anders Blomdell
--
Anders Blomdell Email: anders.blomdell_at_control.lth.se
Department of Automatic Control
Lund University Phone: +46 46 222 4625
P.O. Box 118 Fax: +46 46 138118
SE-221 00 Lund, Sweden
Received on 2007-06-25Z16:31:25