- From: Ingmar Schoegl <ischoegl_at_mail.utexas.edu>
- Date: Fri, 28 Sep 2007 17:44:40 -0500
Frank,
Thanks for your valuable inputs - I was obviously on the wrong track.
After another round of e-mails I finally got the answer I needed to
resolve the addressing problem for the upper 16 channels of my pci-6225
(see NI-DDK forum).
With the (brute-force) modification below, everything works fine now:
--- comedi/drivers/ni_mio_common.c.orig 2007-09-28 17:30:24.000000000
-0500
+++ comedi/drivers/ni_mio_common.c 2007-09-28 17:36:14.000000000
-0500
_at__at_ -1801,6 +1801,12 _at__at_
if(dither) config_bits |= MSeries_AI_Config_Dither_Bit;
// don't use 2's complement encoding
config_bits |= MSeries_AI_Config_Polarity_Bit;
+
+ /* fix to access channels 64 through 79 on PCI-6225 */
+ if (boardtype.reg_type==ni_reg_622x && chan>63) {
+ config_bits |= 0x400;
+ }
+
ni_writew(config_bits, M_Offset_AI_Config_FIFO_Data);
}
ni_prime_channelgain_list(dev);
Thanks a bunch for all your help!
-ingmar-
Received on 2007-09-28Z21:44:40