Re: Re: NI 6259 - Strange values for positive input voltate on analog in

Hi Frank,

thanks for your answer.

> > In ni_mio_common (CVS version) at line 1378 I do a:
> >                         if(boardtype.reg_type == ni_reg_m_series)
> >                         {
> >                                 data[n] =
> > ni_readl(M_Offset_AI_FIFO_Data); rt_printk("ni_mio_common: %i:
> > data[n]==%x\n", __LINE__, data[n]); data[n] += signbits;
> >                         }else
> >                         {
> >                                 d = ni_readw(ADC_FIFO_Data_Register);
> >                                 d += signbits; /* subtle: needs to be
> > short addition */ data[n] = d;
> >                         }
> > For a positive input value (+0.5V) data[n] is ffff8c57,
> > for a negative input value (-0.5V) data[n] is 73d2
> 
> Okay, I've masked off the bogus most significant bits in the driver.  By 
> the way, does comedilib/demo/cmd work for your board?  As I recall, I had 
> to make some guesses as to how dma worked with 16 bit or less boards.
> 

I can run "cmd", it prints out values around 32780.
The stderr of cmd is the following (using the CVS version from a couple of days ago).

command before testing:
start:      now      0
scan_begin: timer    1000000
convert:    timer    1000000
scan_end:   count    4
stop:       count    1000
first test returned 4 (argument conflict)
start:      now      0
scan_begin: timer    4000000
convert:    timer    1000000
scan_end:   count    4
stop:       count    1000
second test returned 0 (success)
start time: 1160557103.701159
end time: 1160557107.704827
time: 4.003668

------------

Also, I have placed the dmesg output of comedi.
Here is the part that is printed out before running "cmd":
------ START -------- 
comedi: version 0.7.73 - David Schleef <ds_at_schleef.org>
rt_pend_tq: RT bottom half scheduler initialized OK
Available NI device IDs: 0x70ab
comedi0: ni_pcimio: pci-6259MITE:0xd0164000 mapped to e03ff000 DAQ:0xd0160000 mapped to e0401000
mite: version = 1, type = 4, mite mode = 1, interface mode = 3
mite: num channels = 8, write post fifo depth = 128, wins = 0, iowins = 2
 ( irq = 22 )m_series_stc_writew: FIXME: register 0xb does not map cleanly on to m-series boards.
m_series_stc_writew: bug! unhandled register=0x3a in switch.
m_series_stc_writew: bug! unhandled register=0x4f in switch.
m_series_stc_writew: bug! unhandled register=0x50 in switch.
------ END --------

Here ist the part that is written during the execution of cmd:
------ START -------- 
m_series_stc_readw: bug! unhandled register=0x7 in switch.
------ END ---------

Thanks for any help on that

Mathias

-- 
Mathias Koehrer
mathias_koehrer_at_arcor.de


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Received on 2006-10-11Z07:59:21