Re: Change of state interrupts

[I'm just just replying to the list now, rather than "All"]

On 11/10/07 11:11, Robin Cornelius wrote:
> Ian Abbott wrote:
>> On 11/10/2007 02:31, Frank Mori Hess wrote:
>>> On Wednesday 10 October 2007 04:23, Robin Cornelius wrote:
>>>> Hi everyone,
>>>>
>>>> I've just started using comedi and I am using a adlink pci7348 card
>>>> (which is not supported) so i hacked up the PCI-7296 driver go get it
>>>> working, which it does :-) (Infact no modification for basic DIO, just
>>>> swap all "adl_pci7296" for "adl_pci7348" and its a go (infact this
>>>> should also work perfectly with the adl_pci7396).
>>> If the boards are essentially the same programming-wise, they should
>>> both be supported by the same driver, as opposed to adding a second
>>> nearly identical one.
>> The register layout differences between PCI-72xx and PCI-73xx look
>> substantial enough to make a separate driver, and the PCI-73xx doesn't
>> even pretend to behave like a bunch of 8255 chips.
> The PCI7348 and PCI7396 does behave as 2 or 4 8255 Chips. I am using the
> 7296 driver with code ripped from 7296. The 73XX has 4 8255 chips at
> base_address +
> 
> #define PORT1A 0x00
> #define PORT2A 0x10
> #define PORT3A 0x20
> #define PORT4A 0x30
> 
> And i am initalising them all with
> 
>  s = dev->subdevices + 0;
>                         subdev_8255_init(dev, s, NULL, (unsigned
> long)(dev->iobase + PORT1A));
> 
>                         s = dev->subdevices + 1;
>                         subdev_8255_init(dev, s, NULL, (unsigned
> long)(dev->iobase + PORT2A));
> 
> 
> And that works perfectly with comedi for digital INs and outs, i set and
> get data no problem from userspace.
> 
> I admit it is not a contigous IO block to access the 4 8255s but it does
> work with the 8255 driver.

I'm looking at PCI-7348+7396_Manual_3.pdf from www.adlinktech.com and
the register layout in that manual is not the same as 8255. It has:

  BASE+00 = PORTA
  BASE+01 = PORTB
  BASE+02 = PORTC
  BASE+03 = unused
  BASE+04 = PnControl (port direction bits for PORTA, PORTB and PORTC)

[big snip]
>> [...]  They also have a strange
>> interrupt multiplexer arrangement, with six interrupt sources,
>> partitioned into two groups of three, with up to one interrupt source
>> selectable from each group.

> Yes the interrupt sources are interesting, perhapses it would be useful
> to support some of them, COS and the trigger on particular ports are
> pretty useful!

Using amplc_dio200 as a model, each interrupt source could be given a
corresponding "channel" number.  Because of the strange multiplexer
arrangement, the cmdtest function for the interrupt subdevice would have
to check the channel list to make sure it contains no more than one
interrupt source from each group.

>>>> One final problem is that I seem to be getting continuous interrupts
>>>> from the card, I believe I am setting the interrupt masks correctly and
>>>> I am ACKing the interrupt correctly but it fires of at a enormous rate.
>>> PCI interrupts can be shared, could it be another device generating
>>> the interrupts?  You might also check if there is a second bit in a
>>> register somewhere you need to use to clear the interrupt, like in
>>> the pci chip.
>> The cards have a "clear interrupt" register that needs to be written to.

> yea thats the one i am writing to when i mean i am ACKing the interrupt.
> I have set all the COS masks to 0 to disable change of state interrupts
> but they just keep coming!.

Perhaps it needs an 'outl' instead of an 'outb' to the Clear Interrupt
register.

-- 
-=( Ian Abbott _at_ MEV Ltd.    E-mail: <abbotti_at_mev.co.uk>        )=-
-=( Tel: +44 (0)161 477 1898   FAX: +44 (0)161 718 3587         )=-

Received on 2007-10-11Z12:44:00