Re: Change of state interrupts

Ian Abbott wrote:
> [I'm just just replying to the list now, rather than "All"]
>   
>
> I'm looking at PCI-7348+7396_Manual_3.pdf from www.adlinktech.com and
> the register layout in that manual is not the same as 8255. It has:
>
>   BASE+00 = PORTA
>   BASE+01 = PORTB
>   BASE+02 = PORTC
>   BASE+03 = unused
>   BASE+04 = PnControl (port direction bits for PORTA, PORTB and PORTC)
>
>   
Ooops, well it was close enough to get some IO working, lol thats what
you get for working too late at night. I had convinced my self it was
the same. Ok so I will rip up some existing code to implement properly!.
Doh!

> [big snip]
>   
>> yea thats the one i am writing to when i mean i am ACKing the interrupt.
>> I have set all the COS masks to 0 to disable change of state interrupts
>> but they just keep coming!.
>>     
>
> Perhaps it needs an 'outl' instead of an 'outb' to the Clear Interrupt
> register.
>   
Thats what i was using as the manual said use 32bit writes. So with my
register bashing above, i could have been doing all kinds of strange
things. Will fix that first and see what the interrupts are upto then.

I will probably be back soon with more stupid questions ;-) once i have
rewritten the first bit for basic IO again.

Robin



-- 
Dr Robin Cornelius
Design Engineer
Hirst Magnetic Instruments Ltd
(UK Magnetics Society management committee member)

Tel: +44 (0) 1326 372734      www.hirst-magnetics.com
Fax: +44 (0) 1326 378069      www.gaussmeter.co.uk

Tesla House, Tregoniggie Industrial Estate
Falmouth, Cornwall, TR11 4SN, U.K.

Reg No: 1564814 England
VAT Registered: GB730 0277 74 

Received on 2007-10-11Z14:21:15